108 lines
4.0 KiB
Python
108 lines
4.0 KiB
Python
# Copyright (c) 2018 Intel.
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# All Rights Reserved.
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#
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# Licensed under the Apache License, Version 2.0 (the "License"); you may
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# not use this file except in compliance with the License. You may obtain
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# a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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"""Cyborg agent resource_tracker test cases."""
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import os
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import fixtures
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from cyborg.accelerator.drivers.fpga import utils
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from cyborg.accelerator.drivers.fpga.intel import sysinfo
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from cyborg.agent.resource_tracker import ResourceTracker
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from cyborg.conductor import rpcapi as cond_api
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from cyborg.conf import CONF
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from cyborg.tests import base
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from cyborg.tests.unit.accelerator.drivers.fpga.intel import prepare_test_data
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class TestResourceTracker(base.TestCase):
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"""Test Agent ResourceTracker """
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def setUp(self):
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super(TestResourceTracker, self).setUp()
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self.syspath = sysinfo.SYS_FPGA
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sysinfo.SYS_FPGA = "/sys/class/fpga"
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tmp_sys_dir = self.useFixture(fixtures.TempDir())
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prepare_test_data.create_fake_sysfs(tmp_sys_dir.path)
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sysinfo.SYS_FPGA = os.path.join(
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tmp_sys_dir.path, sysinfo.SYS_FPGA.split("/", 1)[-1])
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utils.SYS_FPGA_PATH = sysinfo.SYS_FPGA
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self.host = CONF.host
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self.cond_api = cond_api.ConductorAPI()
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self.rt = ResourceTracker(self.host, self.cond_api)
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def tearDown(self):
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super(TestResourceTracker, self).tearDown()
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sysinfo.SYS_FPGA = self.syspath
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utils.SYS_FPGA_PATH = self.syspath
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def test_update_usage(self):
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"""Update the resource usage and stats after a change in an
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instance
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"""
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# FIXME(Shaohe Feng) need add testcase. How to check the fpgas
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# has stored into DB by conductor correctly?
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pass
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def test_get_fpga_devices(self):
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expect = {
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'0000:5e:00.0': {
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'function': 'pf',
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'assignable': False,
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'pr_num': '1',
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'name': 'intel-fpga-dev.0',
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'interface_type': 'pci',
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'vendor_id': '0x8086',
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'devices': '0000:5e:00.0',
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'regions': [{
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'function': 'vf',
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'assignable': True,
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'name': 'intel-fpga-dev.2',
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'interface_type': 'pci',
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'vendor_id': '0x8086',
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'devices': '0000:5e:00.1',
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'parent_devices': '0000:5e:00.0',
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'path': '%s/intel-fpga-dev.2' % sysinfo.SYS_FPGA,
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'product_id': '0xbcc1'}],
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'parent_devices': '',
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'path': '%s/intel-fpga-dev.0' % sysinfo.SYS_FPGA,
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'product_id': '0xbcc0'},
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'0000:5e:00.1': {
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'function': 'vf',
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'assignable': True,
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'name': 'intel-fpga-dev.2',
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'interface_type': 'pci',
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'vendor_id': '0x8086',
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'devices': '0000:5e:00.1',
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'parent_devices': '0000:5e:00.0',
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'path': '%s/intel-fpga-dev.2' % sysinfo.SYS_FPGA,
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'product_id': '0xbcc1'},
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'0000:be:00.0': {
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'function': 'pf',
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'assignable': True,
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'pr_num': '0',
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'name': 'intel-fpga-dev.1',
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'interface_type': 'pci',
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'vendor_id': '0x8086',
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'devices': '0000:be:00.0',
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'parent_devices': '',
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'path': '%s/intel-fpga-dev.1' % sysinfo.SYS_FPGA,
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'product_id': '0xbcc0'}}
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fpgas = self.rt._get_fpga_devices()
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self.assertDictEqual(expect, fpgas)
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