164 lines
4.6 KiB
Python
164 lines
4.6 KiB
Python
# Copyright 2018 Intel, Inc.
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#
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# Licensed under the Apache License, Version 2.0 (the "License"); you may
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# not use this file except in compliance with the License. You may obtain
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# a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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"""
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Cyborg Intel FPGA driver implementation.
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"""
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# from cyborg.accelerator.drivers.fpga.base import FPGADriver
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import glob
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import os
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import re
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SYS_FPGA = "/sys/class/fpga"
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DEVICE = "device"
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PF = "physfn"
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VF = "virtfn*"
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BDF_PATTERN = re.compile(
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"^[a-fA-F\d]{4}:[a-fA-F\d]{2}:[a-fA-F\d]{2}\.[a-fA-F\d]$")
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DEVICE_FILE_MAP = {"vendor": "vendor_id",
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"device": "product_id",
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"sriov_numvfs": "pr_num"}
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DEVICE_FILE_HANDLER = {}
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DEVICE_EXPOSED = ["vendor", "device", "sriov_numvfs"]
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def all_fpgas():
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# glob.glob1("/sys/class/fpga", "*")
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return glob.glob(os.path.join(SYS_FPGA, "*"))
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def all_vf_fpgas():
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return [dev.rsplit("/", 2)[0] for dev in
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glob.glob(os.path.join(SYS_FPGA, "*/device/physfn"))]
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def all_pure_pf_fpgas():
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return [dev.rsplit("/", 2)[0] for dev in
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glob.glob(os.path.join(SYS_FPGA, "*/device/virtfn0"))]
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def target_symbolic_map():
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maps = {}
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for f in glob.glob(os.path.join(SYS_FPGA, "*/device")):
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maps[os.path.realpath(f)] = os.path.dirname(f)
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return maps
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def bdf_path_map():
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maps = {}
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for f in glob.glob(os.path.join(SYS_FPGA, "*/device")):
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maps[os.path.basename(os.path.realpath(f))] = os.path.dirname(f)
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return maps
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def all_vfs_in_pf_fpgas(pf_path):
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maps = target_symbolic_map()
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vfs = glob.glob(os.path.join(pf_path, "device/virtfn*"))
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return [maps[os.path.realpath(vf)] for vf in vfs]
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def all_pf_fpgas():
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return [dev.rsplit("/", 2)[0] for dev in
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glob.glob(os.path.join(SYS_FPGA, "*/device/sriov_totalvfs"))]
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def is_vf(path):
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return True if glob.glob(os.path.join(path, "device/physfn")) else False
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def find_pf_by_vf(path):
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maps = target_symbolic_map()
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p = os.path.realpath(os.path.join(path, "device/physfn"))
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return maps[p]
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def is_bdf(bdf):
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return True if BDF_PATTERN.match(bdf) else False
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def get_bdf_by_path(path):
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return os.path.basename(os.readlink(os.path.join(path, "device")))
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def split_bdf(bdf):
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return ["0x" + v for v in bdf.replace(".", ":").rsplit(":")[1:]]
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def get_pf_bdf(bdf):
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path = bdf_path_map().get(bdf)
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if path:
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path = find_pf_by_vf(path) if is_vf(path) else path
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return get_bdf_by_path(path)
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return bdf
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def fpga_device(path):
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infos = {}
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def read_line(filename):
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with open(filename) as f:
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return f.readline().strip()
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# NOTE "In 3.x, os.path.walk is removed in favor of os.walk."
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for (dirpath, dirnames, filenames) in os.walk(path):
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for filename in filenames:
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if filename in DEVICE_EXPOSED:
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key = DEVICE_FILE_MAP.get(filename) or filename
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if key in DEVICE_FILE_HANDLER and callable(
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DEVICE_FILE_HANDLER(key)):
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infos[key] = DEVICE_FILE_HANDLER(key)(
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os.path.join(dirpath, filename))
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else:
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infos[key] = read_line(os.path.join(dirpath, filename))
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return infos
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def fpga_tree():
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def gen_fpga_infos(path, vf=True):
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name = os.path.basename(path)
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dpath = os.path.realpath(os.path.join(path, DEVICE))
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bdf = os.path.basename(dpath)
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func = "vf" if vf else "pf"
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pf_bdf = os.path.basename(
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os.path.realpath(os.path.join(dpath, PF))) if vf else ""
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fpga = {"path": path, "function": func,
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"devices": bdf, "assignable": True,
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"parent_devices": pf_bdf,
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"name": name,
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"interface_type": "pci"}
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d_info = fpga_device(dpath)
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fpga.update(d_info)
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return fpga
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devs = []
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pure_pfs = all_pure_pf_fpgas()
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for pf in all_pf_fpgas():
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fpga = gen_fpga_infos(pf, False)
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if pf in pure_pfs:
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fpga["assignable"] = False
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fpga["regions"] = []
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vfs = all_vfs_in_pf_fpgas(pf)
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for vf in vfs:
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vf_fpga = gen_fpga_infos(vf, True)
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fpga["regions"].append(vf_fpga)
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devs.append(fpga)
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return devs
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